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32-position manual up/down control potentiometer ad5228 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent ri ghts of analog devices. trademarks and registered trademarks are the prop erty of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.326.8703 ? 2004 analog devices, inc. all rights reserved. features 32-position digital potentiometer 10 k?, 50 k?, 100 k? end-to-end terminal resistance simple manual up/down control self-contained, requires only 2 pushbutton tactile switches built-in adaptive debouncer discrete step-up/step-down control autoscan up/down control with 4 steps per second pin-selectable zero-scale/midscale preset low potentiometer mode tempco, 5 ppm/c low rheostat mode tempco, 35 ppm/c digital control compatible ultralow power, i dd = 0.4 a typ and 3 a max low operating voltage, 2.7 v to 5.5 v automotive temperature range, ?40c to +105c compact thin sot-23-8 (2.9 mm 3 mm) pb-free package applications mechanical potentiometer and trimmer replacements lcd backlight, contrast, and brightness controls digital volume control portable device-level adjustments electronic front panel-level controls programmable power supply general description the ad5228 is analog devices latest 32-step-up/step-down control digital potentiometer emulating mechanical potenti- ometer operation 1 . its simple up/down control interface allows manual control with just two external pushbutton tactile switches. the ad5228 is designed with a built-in adaptive debouncer that ignores invalid bounces due to contact bounce commonly found in mechanical switches. the debouncer is adaptive, accommodating a variety of pushbutton tactile switches that generally have less than 10 ms of bounce time during contact closures. when choosing the switch, the user should consult the timing specification of the switch to ensure its suitability in an ad5228 application. 1 the terms digital potentiometer and rdac are used interchangeably. functional block diagram 04422-0-001 up/down control logic discrete step/auto scan detect adaptive debouncer zero- or mid- scale preset ad5228 push-up button push-down button r1 r2 d e c o d e a w b v dd pre gnd pu pd figure 1. the ad5228 can increment or decrement the resistance in discrete steps or in autoscan mode. when the pu or pd button is pressed briefly (no longer than 0.6 s), the resistance of the ad5228 changes by one step. when the pu or pd button is held continuously for more than a second, the device activates the autoscan mode and changes four resistance steps per second. the ad5228 can also be controlled digitally; its up/down features simplify microcontroller usage. the ad5228 is available in a compact thin sot-23-8 (tsot-8) package. the part is guaranteed to operate over the automotive temperature range of ?40c to +105c. the ad5228s simple interface, small footprint, and very low cost enable it to replace mechanical potentiometers and trimmers with typically 3 improved resolution, solid-state reliability, and faster adjustment, resulting in considerable cost saving in end users systems. users who consider eemem potentiometers should refer to the recommendations in the applications section. table 1. truth table pu pd operation 1 0 0 r wb decrement 0 1 r wb increment 1 0 r wb decrement 1 1 r wb does not change 1 r wa increments if r wb decrements and vice versa.
ad5228 rev. 0 | page 2 of 20 table of contents electrical characteristics ................................................................. 3 interface timing diagrams ......................................................... 4 absolute maximum ratings............................................................ 5 esd caution.................................................................................. 5 pin configuration and function descriptions............................. 6 typical performance characteristics ............................................. 7 theory of operation ...................................................................... 11 programming the digital potentiometers............................... 12 controlling inputs ...................................................................... 13 terminal voltage operation range.......................................... 13 power-up and power-down sequences.................................. 14 layout and power supply biasing ............................................ 14 applications..................................................................................... 15 manual adjustable led driver ................................................ 15 adjustable current source for led driver ............................ 15 automatic lcd panel backlight control................................ 16 audio amplifier with volume control ................................... 16 constant bias with supply to retain resistance setting...... 17 outline dimensions ....................................................................... 18 ordering guide .......................................................................... 18 revision history revision 0: initial version
ad5228 rev. 0 | page 3 of 20 electrical characteristics 10 k?, 50 k?, 100 k? versions: v dd = 3 v 10% or 5 v 10%, v a = v dd , v b = 0 v, ?40c < t a < +105c, unless otherwise noted. table 2. parameter symbol conditions min typ 1 max unit dc characteristics, rheostat mode resistor differential nonlinearity 2 r-dnl r wb , a terminal = no connect ?0.5 0.05 +0.5 lsb resistor integral nonlinearity 2 r-inl r wb , a terminal = no connect ?0.5 0.1 +0.5 lsb nominal resistor tolerance 3 ?r ab /r ab ?20 +20 % resistance temperature coefficient (?r ab /r ab ) 10 4 /?t 35 ppm/c wiper resistance r w v dd = 2.7 v 100 200 ? v dd = 5.5 v 50 ? dc characteristics, potentiometer divider mode (specifications apply to all rdacs) resolution n 5 bits integral nonlinearity 3 inl ?0.5 0.05 +0.5 lsb differential nonlinearity 3, 5 dnl ?0.5 0.05 +0.5 lsb voltage divider temperature coefficient (?v w /v w ) 10 4 /?t midscale 5 ppm/c full-scale error v wfse +15 steps from midscale ?1 ?0.5 0 lsb zero-scale error v wzse ?16 steps from midscale 0 0.3 0.5 lsb resistor terminals voltage range 6 v a, b, w with respect to gnd 0 v dd v capacitance 4 a, b c a, b f = 1 mhz, measured to gnd 140 pf capacitance 4 w c w f = 1 mhz, measured to gnd 150 pf common-mode leakage i cm v a = v b = v w 1 na pu , pd inputs input high v ih v dd = 5 v 2.4 5.5 v input low v il v dd = 5 v 0 0.8 v input current i i v in = 0 v or 5 v 1 a input capacitance 4 c i 5 pf power supplies power supply range v dd v dd = 5 v, pu = pd = v dd 2.7 5.5 v supply standby current i dd_stby 0.4 3 a supply active current 7 i dd_act v dd = 5 v, pu or pd = 0 v 50 110 a power dissipation 7, 8 p diss v dd = 5 v 17 w power supply sensitivity pssr v dd = 5 v 10% 0.01 0.05 %/% footnotes on next page.
ad5228 rev. 0 | page 4 of 20 parameter symbol conditions min typ 1 max unit dynamic characteristics 4, 9, 10, 11 built-in debounce and settling time 12 t db 6 ms pu low pulse width t pu 12 ms pd low pulse width t pd 12 ms pu high repetitive pulse width t pu_rep 1 s pd high repetitive pulse width t pd_rep 1 s autoscan start time t as_start pu or pd = 0 v 0.6 0.8 1.2 s autoscan time t as pu or pd = 0 v 0.16 0.25 0.38 s bandwidth C3 db bw_10 r ab = 10 k?, midscale 460 khz bw_50 r ab = 50 k?, midscale 100 khz bw_100 r ab = 100 k?, midscale 50 khz total harmonic distortion thd v a = 1 v rms, r ab = 10 k?, v b = 0 v dc, f = 1 khz 0.05 % resistor noise voltage e n_wb r wb = 5 k?, f = 1 khz 14 nv/ hz 1 typicals represent average readings at 25c, v dd = 5 v. 2 resistor position nonlinearity error, r-inl, is the deviatio n from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. r-dnl measures the relative step change from ideal between successive tap positions. parts are guaranteed monotonic. 3 inl and dnl are measured at v w with the rdac configured as a potentiometer divide r similar to a voltage ou tput d/a converter. v a = v dd and v b = 0 v. 4 guaranteed by design and not subject to production test. 5 dnl specification limits of 1 lsb maximum ar e guaranteed monotonic operating conditions. 6 resistor terminals a, b, and w have no limit ations on polarity with respect to each other. 7 pu and pd have 100 k? internal pull-up resistors, i dd_act = v dd /100 k? + i osc (internal oscillator op erating current) when pu or pd is connected to ground. 8 p diss is calculated based on i dd_stby v dd only. i dd_act duration should be short. users should not hold pu or pd pin to ground longer than necessary to elevate power dissipation. 9 bandwidth, noise, and settling time are dependent on the terminal resistance value chosen. the lowest r value results in the f astest settling time and highest bandwidth. the highest r value results in the minimum overall power consumption. 10 all dynamic characteristics use v dd = 5 v. 11 note that all input control voltages are specified with t r = t f = 1 ns (10% to 90% of v dd ) and timed from a voltage level of 1.6 v. switching characteristics are measured using v dd = 5 v. 12 the debouncer keeps monitoring the logic-low level once pu is connected to ground. once the signal lasts longer than 11 ms, the debouncer assumes the last bounce is met and allows the ad5228 to increment by one step. if the pu signal remains at low and reaches t as_start , the ad5528 increments again, see figure 7. similar characteristics apply to pd operation. interface timing diagrams 04422-0-004 r wb pu t db t pu t pu_rep figure 2. increment r wb in discrete steps 04422-0-005 r wb pu t db t as t as_start figure 3. increment r wb in autoscan mode 04422-0-006 r wb pu t db t pd t pd_rep figure 4. decrement r wb in discrete steps 04422-0-007 r wb pd t db t as t as_start figure 5. decrement r wb in autoscan mode
ad5228 rev. 0 | page 5 of 20 absolute maximum ratings table 3. parameter rating v dd to gnd ?0.3 v, +7 v v a , v b , v w to gnd 0 v, v dd pu , pd , pre voltage to gnd 0 v, v dd maximum current i wb , i wa pulsed 20 ma i wb continuous (r wb 5 k?, a open) 1 1 ma i wa continuous (r wa 5 k?, b open) 1 1 ma i ab continuous (r ab = 10 k?/50 k?/100 k?) 1 500 a/100 a/ 50 a operating temperature range ?40c to +105c maximum junction temperature (t j max) 150c storage temperature ?65c to +150c lead temperature (soldering, 10 s C 30 s) 245c thermal resistance 2 ja 230c/w 1 maximum terminal current is boun ded by the maximum applied voltage across any two of the a, b, and w terminals at a given resistance, the maximum current handling of the sw itches, and the maximum power dissipation of the package. v dd = 5 v. 2 package power dissipation = (t j max C t a ) / ja . stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution esd (electrostatic discharge) sensitive device. electros tatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge wi thout detection. although this product features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality.
ad5228 rev. 0 | page 6 of 20 pin configuration and fu nction descriptions 04422-0-003 ad5228 pu 1 pd 2 a 3 gnd 4 v dd pre b w 8 7 6 5 figure 6. sot-23-8 pin configuration table 4. pin function descriptions pin no. mnemonic description 1 pu push-up pin. connect to the external pushbutton. active low. a 100 k? pull-up resistor is connected to v dd . 2 pd push-down pin. connect to the external pushbutton. active low. a 100 k? pull-up resistor is connected to v dd . 3 a resistor terminal a. gnd v a v dd . 4 gnd common ground. 5 w wiper terminal w. gnd v w v dd . 6 b resistor terminal b. gnd v b v dd . 7 pre power-on preset. output = midscale if pr e = gnd; output = zero scale if pre = v dd . do not let the pre pin float. no pull-up resistor is needed. 8 v dd positive power supply, 2.7 v to 5.5 v.
ad5228 rev. 0 | page 7 of 20 typical performance characteristics 0.10 ?0.10 ?0.08 ?0.06 ?0.04 ?0.02 0 0.02 0.04 0.06 0.08 032 28 24 20 16 12 8 4 04422-0-008 code (decimal) rheostat mode inl (lsb) t a = 25 c 5.5v 2.7v figure 7. r-inl vs. code vs. supply voltages 0.10 ?0.10 ?0.08 ?0.06 ?0.04 ?0.02 0 0.02 0.04 0.06 0.08 032 28 24 20 16 12 8 4 04422-0-009 code (decimal) rheostat mode inl (lsb) v dd = 5.5v ?40 c +25 c +85 c +105 c figure 8. r-inl vs. code vs. temperature, v dd = 5 v 0.10 ?0.10 ?0.08 ?0.06 ?0.04 ?0.02 0 0.02 0.04 0.06 0.08 032 28 24 20 16 12 8 4 04422-0-010 code (decimal) rheostat mode dnl (lsb) t a = 25 c 5.5v 2.7v figure 9. r-dnl vs. code vs. supply voltages 0.10 ?0.10 ?0.08 ?0.06 ?0.04 ?0.02 0 0.02 0.04 0.06 0.08 032 28 24 20 16 12 8 4 04422-0-011 code (decimal) rheostat mode dnl (lsb) v dd = 5.5v ?40 c +25 c +85 c +105 c figure 10. r-dnl vs. code vs. temperature, v dd = 5 v 0.10 ?0.10 ?0.08 ?0.06 ?0.04 ?0.02 0 0.02 0.04 0.06 0.08 032 28 24 20 16 12 8 4 04422-0-012 code (decimal) potentiometer mode inl (lsb) t a = 25 c 5.5v 2.7v figure 11. inl vs. code vs. supply voltages 0.10 ?0.10 ?0.08 ?0.06 ?0.04 ?0.02 0 0.02 0.04 0.06 0.08 032 28 24 20 16 12 8 4 04422-0-013 code (decimal) potentiometer mode inl (lsb) v dd = 5.5v ?40 c +25 c +85 c +105 c figure 12. inl vs. code, v dd = 5 v
ad5228 rev. 0 | page 8 of 20 0.10 ?0.10 ?0.08 ?0.06 ?0.04 ?0.02 0 0.02 0.04 0.06 0.08 032 28 24 20 16 12 8 4 04422-0-014 code (decimal) potentiometer mode dnl (lsb) t a = 25 c 5.5v 2.7v figure 13. dnl vs. code vs. supply voltages 0.10 ?0.10 ?0.08 ?0.06 ?0.04 ?0.02 0 0.02 0.04 0.06 0.08 032 28 24 20 16 12 8 4 04422-0-015 code (decimal) potentiometer mode dnl (lsb) v dd = 5.5v ?40 c +25 c +85 c +105 c figure 14. dnl vs. code, v dd = 5 v ? 0.50 ?0.90 ?0.85 ?0.80 ?0.75 ?0.70 ?0.65 ?0.60 ?0.55 ?40 ?20 0 20 40 60 100 80 04422-0-016 temperature ( c) fse (lsb) v dd = 5.5v v dd = 2.7v figure 15. full-scale error vs. temperature 0.40 0.45 0.50 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 ?40 ?20 0 20 40 60 100 80 04422-0-017 temperature ( c) zse (lsb) v dd = 5.5v v dd = 2.7v figure 16. zero-scale error vs. temperature 1 0.1 ?40 ?20 0 20 40 60 100 80 04422-0-018 temperature ( c) supply standby current ( a) v dd = 5.5v i dd_act = 50 a typ figure 17. supply current vs. temperature 120 0 20 40 60 80 100 ?40 ?20 0 20 40 60 100 80 04422-0-019 temperature ( c) nominal resistance r ab (k ? ) v dd = 5.5v r ab = 100k ? r ab = 50k ? r ab = 10k ? figure 18. nominal resistance vs. temperature
ad5228 rev. 0 | page 9 of 20 120 0 20 40 60 80 100 ?40 ?20 0 20 40 60 100 80 04422-0-020 temperature ( c) wiper resistance, r w ( ? ) v dd = 2.7v v dd = 5.5v figure 19. wiper resistance vs. temperature 150 ?30 0 30 60 90 120 0 4 8 121620242832 04422-0-021 code (decimal) rheostat mode tempco, ? r wb / ? t (ppm/ c) 10k ? 50k ? 100k ? v dd = 5.5v a = open figure 20. rheostat mode tempco ?r wb /?t vs. code 20 ?20 ?15 ?10 ?5 0 5 10 15 0 4 8 12 16 20 24 28 32 04422-0-022 code (decimal) potentiometer mode tempco, ? v wb / ? t (ppm/ c) 10k ? 50k ? 100k ? v dd = v a = 5.5v v b = 0v figure 21. potentiometer mode tempco ?v wb /?t vs. code 6 ?54 ?48 ?42 ?36 ?30 ?24 ?18 ?12 ?6 0 1k 10k 1m start 1 000.000hz stop 1 000 000.000hz ref level 0db / di v 6.0db marke r mag (a/r) 469 390.941h z ?8.966db 100k 04422-0-050 gain (db) t a = 25 c v dd = 5.5v v a = 50mv rms 16 steps 8 steps 4 steps 2 steps 1 step figure 22. gain vs. frequency vs. code, r ab = 10 k? 6 ?54 ?48 ?42 ?36 ?30 ?24 ?18 ?12 ?6 0 1k 10k 1m start 1 000.000hz stop 1 000 000.000hz ref level 0db / di v 6.0db marke r mag (a/r) 97 525.233h z ?9.089db 100k 04422-0-051 gain (db) t a = 25 c v dd = 5.5v v a = 50mv rms 16 steps 8 steps 4 steps 2 steps 1 step figure 23. gain vs. frequency vs. code, r ab = 50 k? 6 ?54 ?48 ?42 ?36 ?30 ?24 ?18 ?12 ?6 0 1k 10k 1m start 1 000.000hz stop 1 000 000.000hz ref level 0db / di v 6.0db marke r mag (a/r) 51 404.427h z ?9.123db 100k 04422-0-052 gain (db) t a = 25 c v dd = 5.5v v a = 50mv rms 16 steps 8 steps 4 steps 2 steps 1 step figure 24. gain vs. frequency vs. code, r ab = 100 k?
ad5228 rev. 0 | page 10 of 20 0 ?60 ?40 ?20 100 1k 10k 100k 1m 04422-0-026 frequency (hz) psrr (db) step = midscale, v a = v dd , v b = 0v v dd = 3v dc 10% p-p ac v dd = 5v dc 10% p-p ac figure 25. psrr 04422-0-027 ch1 5.00v ch2 100mv m2.00ms a ch1 3.00v v w 2 1 pu t 3.92000ms ? : 8.32ms ? : 4.00mv @: 8.24ms @: 378mv v dd = 5v v a = 5v v b = 0v figure 26. basic increment 04422-0-028 ch1 5.00v ch2 100mv m2.00ms a ch1 2.60v v w 1 2 pu t 59.8000ms v dd = 5v v a = 5v v b = 0v figure 27. repetitive increment 04422-0-029 ch1 5.00v ch2 200mv m2.00ms a ch1 2.80v v w 1 2 pu t 800.000ms v dd = 5v v a = 5v v b = 0v figure 28. autoscan increment 1.2 0 0.2 0.4 0.6 0.8 1.0 032 28 24 20 16 12 8 4 04422-0-030 code (decimal) theoretical i wb_max (ma) r ab = 50k ? r ab = 10k ? r ab = 100k ? v a = open t a = 25 c figure 29. maximum i wb vs. code
ad5228 rev. 0 | page 11 of 20 theory of operation the ad5228 is a 32-position manual up/down digitally con- trolled potentiometer with selectable power-on preset. the ad5228 presets to midscale when the pre pin is tied to ground and to zero-scale when pre is tied to v dd . floating the pre pin is not allowed. the step-up and step-down operations require the activation of the pu (push-up) and pd (push-down) pins. these pins have 100 k? internal pull-up resistors that the pu and pd activate at logic low. the common practice is to apply external pushbuttons (tactile switches) as shown in figure 30. 04422-0-031 up/down control logic discrete step/auto scan detect adaptive debouncer zero- or mid- scale preset ad5228 push-up button push-down button r1 r2 d e c o d e a w b v dd pre gnd pu pd figure 30. typical pushbutton interface because of the bounce mechanism commonly found in the switches during contact closures, a single pushbutton press usually generates numerous bounces during contact closure. note that the term pushbutton refers specifically to a pushbutton tactile switch or a similar switch that has 10 ms or less bounce time during contact closure. figure 31 shows the characteristics of one such switch, the krs-3550 tactile switch. figure 32 and figure 33 show close ups of the initial bounces and end bounces, respectively. 04422-0-032 ch1 1.00v m40.0ms a ch1 2.38v 1 t 20.40% figure 31. typical tactile switch characteristics 04422-0-033 ch1 1.00v m100 s a ch1 2.38v 1 t 20.20% figure 32. close-up of initial bounces 04422-0-034 ch1 1.00v m10.0 s a ch1 2.38v 1 t 20.20% figure 33. close-up of final bounces the following paragraphs describes the pu incrementing operation. similar characteristics apply to the pd decrementing operation. the ad5228 features an adaptive debouncer that monitors the duration of the logic-low level of pu signal between bounces. if the pu logic-low level signal duration is shorter than 7 ms, the debouncer ignores it as an invalid incrementing command. whenever the logic-low level of pu signal lasts longer than 11 ms, the debouncer assumes that the last bounce is met and therefore increments r wb by one step. repeatedly pressing the pu button for fast adjustment without missing steps is allowed, provided that each press is not shorter than t pu , which is 12 ms (see figure 2). as a point of reference, an advanced video game player can press a pushbutton switch in 40 ms.
ad5228 rev. 0 | page 12 of 20 if the pu button is held for longer than 1 second, continuously holding it activates autoscan mode such that the ad5228 increments by four r wb steps per second (see figure 3). whenever the maximum r wb (= r ab ) is reached, r wb stops incrementing regardless of the state of the pu pin. any continu- ous holding of the pu pin to logic-low simply elevates the supply current. when both pu and pd buttons are pressed, r wb decrements until it stops at zero scale. all the preceding descriptions apply to pd operation. due to the tolerance of the internal rc oscillator, all the timing information given previously is based on the typical values, which can vary 30%. the ad5228 debouncer is carefully designed to handle common pushbutton tactile switches. other switches that have excessive bounces and duration are not suitable to use in conjunction with the ad5228. 04422-0-035 b w a d0 d2 d1 d4 d3 r s r s = r ab /32 r w r s r s r s rdac up/down ctrl and decode figure 34. ad5228 equivalent rdac circuit programming the digital potentiometers rheostat operation if only the w-to-b or w-to-a terminals are used as variable resistors, the unused terminal can be opened or shorted with w. such operation is called rheostat mode and is shown in figure 35. 04422-0-036 a w b a w b a w b figure 35. rheostat mode configuration the end-to-end resistance, r ab , has 32 contact points accessed by the wiper terminal, plus the b terminal contact if r wb is used. pushing the pu pin discretely increments r wb by one step. the total resistance becomes r s + r w as shown in figure 34. the change of r wb can be determined by the number of discrete pu executions provided that its maximum setting is not reached during operation. ? r wb can, therefore, be approximated as ? ? ? ? ? ? + + = ? w ab wb r r pu r 32 (1) ? ? ? ? ? ? + ? = ? w ab wb r r pd r 32 (2) where: pu is the number of push-up executions. pd is the number of push-down executions. r ab is the end-to-end resistance. r w is the wiper resistance contributed by the on-resistance of the internal switch. similar to the mechanical potentiometer, the resistance of the rdac between the wiper w and terminal a also produces a complementary resistance, r wa . when these terminals are used, the b terminal can be opened or shorted to w. r wa can also be approximated if its maximum and minimum settings are not reached. ( ) ? ? ? ? ? ? + ? ? = ? w ab wa r r pu r 32 32 3) ( ) ? ? ? ? ? ? + ? + = ? w ab wa r r pd r 32 32 (4) note that equations 1 to 4 do not apply when pu and pd = 0 execution. because in the lowest end of the resistor string, a finite wiper resistance is present, care should be taken to limit the current flow between w and b in this state to a maximum pulse current of no more than 20 ma. otherwise, degradation or possible destruction of the internal switches can occur. the typical distribution of the resistance tolerance from device to device is process lot dependent, and 20% tolerance is possible.
ad5228 rev. 0 | page 13 of 20 potentiometer mode operation if all three terminals are used, the operation is called potenti- ometer mode . the most common configuration is the voltage divider operation as shown in figure 36. 04422-0-037 a w b v i v c figure 36. potentiometer mode configuration the change of v wb is known provided that the ad5228 maximum or minimum scale has not been reached during operation. if the effect of wiper resistance is ignored, the transfer functions can be simplified as a wb v pu v 32 + = ? (5) a wb v pd v 32 + = ? (6) unlike in rheostat mode operation where the absolute tolerance is high, potentiometer mode operation yields an almost ratio- metric function of pu /32 or pd /32 with a relatively small error contributed by the r w term. the tolerance effect is, therefore, almost canceled. although the thin film step resistor r s and cmos switch resistance, r w , have very different temperature coefficients, the ratiometric adjustment also reduces the overall temperature coefficient effect to 5 ppm/c except at low value codes where r w dominates. potentiometer mode operations include an op amp input and feedback resistors network and other voltage scaling applications. the a, w, and b terminals can be input or output terminals and have no polarity constraint provided that |v ab |, |v wa |, and |v wb | do not exceed v dd -to-gnd. controlling inputs all pu and pd inputs are protected with a zener esd structure as shown in figure 37. 04422-0-038 v dd pu 100k ? decode and debounce ckt figure 37. equivalent esd protection in pu and pd pins pu and pd pins are usually connected to pushbutton tactile switches for manual operation, but the ad5228 can also be controlled digitally. it is recommended to add external mosfets or transistors that simplify the logic controls. 04422-0-039 up/down control logic discrete step/auto scan detect adaptive debouncer zero- or mid- scale preset ad5228 r1 r2 d e c o d e a w b v dd pre gnd pu pd down n2 2n7002 up n1 2n7002 figure 38. digital control with external mosfets terminal voltage operation range the ad5228 is designed with internal esd diodes for protection. these diodes also set the voltage boundary of the terminal operating voltages. positive signals present on te r m i n a l a , b, o r w t h at e x c e e d v dd are clamped by the forward-biased diode. there is no polarity constraint between v a , v w , and v b , but they cannot be higher than v dd or lower than gnd. 0 4422-0-040 v dd gnd a w b figure 39. maximum terminal voltages set by v dd and gnd
ad5228 rev. 0 | page 14 of 20 power-up and power-down sequences because of the esd protection diodes that limit the voltage compliance at terminals a, b, and w (figure 39), it is important to power on v dd before applying any voltage to terminals a, b, and w. otherwise, the diodes are forward-biased such that v dd is powered on unintentionally and can affect other parts of the circuit. similarly, v dd should be powered down last. the ideal power-on sequence is in the following order: gnd, v dd , and v a/b/w . the order of powering v a , v b , and v w is not important as long as they are powered on after v dd . the states of the pu and pd pins can be logic high or floating, but they should not be logic low during power-on. layout and power supply biasing it is always a good practice to use compact, minimum lead length layout design. the leads to the input should be as direct as possible with a minimum conductor length. ground paths should have low resistance and low inductance. it is also good practice to bypass the power supplies with quality capacitors. low esr (equivalent series resistance) 1 f to 10 f tantalum or electrolytic capacitors should be applied at the supplies to minimize any transient disturbance and to filter low frequency ripple. figure 39 illustrates the basic supply bypassing configu- ration for the ad5228. 04422-0-041 v dd v dd + gnd ad5228 c2 10 f c1 0.1 f figure 40. power supply bypassing
ad5228 rev. 0 | page 15 of 20 applications manual adjustable led driver the ad5228 can be used in many electronics-level adjustments such as led drivers for lcd panel backlight controls. figure 41 shows a manually adjustable led driver. the ad5228 sets the voltage across the white led d1 for the brightness control. since u2 handles up to 250 ma, a typical white led with v f of 3.5 v requires a resistor, r1, to limit u2 current. this circuit is simple but not power efficient. the u2 shutdown pin can be toggled with a pwm signal to conserve power. 04422-0-042 push-up button push-down button a w b 10k ? v dd gnd pre pu pd u1 ad5228 c1 1 f c2 0.1 f 5v u2 ad8591 + ? v+ v? sd 5v c3 0.1 f r1 6 ? white led d1 pwm figure 41. low cost adjustable led driver adjustable current source for led driver because led brightness is a function of current rather than of forward voltage, an adjustable current source is preferred as shown in figure 42. the load current can be found as the v wb of the ad5228 divided by r set . set wb d1 r v i = (7) the u1 adp3333arm-1.5 is a 1.5 v ldo that is lifted above or lowered below 0 v. when v wb of the ad5228 is at its minimum, there is no current through d1, so the gnd pin of u1 is at C1.5 v if u3 is biased with the dual supplies. as a result, some of the u2 low resistance steps have no effect on the output until the u1 gnd pin is lifted above 0 v. when v wb of the ad5228 is at its maximum, v out becomes vl + v ab , so the u1 supply voltage must be biased with adequate headroom. similarly, pwm signal can be applied at the u1 shutdown pin for power efficiency. 04422-0-043 push-up button push-down button a w b 10k ? r1 418k ? v dd gnd pre pu pd u2 ad5228 5v 5v u3 ad8591 + ? v+ v? 5v pwm v in v out gnd u1 adp3333 arm-1.5 sd r set 0.1 ? vl id d1 figure 42. adjustable current source for led driver adjustable high power led driver the previous circuit works well for a single led. figure 43 shows a circuit that can drive three to four high power leds. the adp1610 is an adjustable boost regulator that provides the voltage headroom and current for the leds. the ad5228 and the op amp form an average gain of 12 feedback network that servos the r set voltage and the adp1610 fb pin 1.2 v band gap reference voltage. as the loop is set, the voltage across r set is regulated around 0.1 v and adjusted by the digital potentiometer. set r led r v i set = (8) r set should be small enough to conserve power but large enough to limit maximum led current. r3 should also be used in par- allel with ad5228 to limit the led current within an achievable range. a wider current adjustment range is possible by lowering the r2 to r1 ratio as well as changing r3 accordingly. 04422-0-044 ss rt gnd in u2 adp1610 sw fb pwm 1.2v sd comp c ss 10nf c c 390pf r c 100k ? l1 10 f d1 c3 10 f r4 13.5k ? d2 d3 d4 v out c2 10 f 5v + ? ad8541 u1 l1?slf6025-100m1r0 d1?mbr0520lt1 u3 v+ v? 5v c8 0.1 f u1 ad5228 ba 10k ? r3 200 ? w r1 100 ? r2 1.1k ? r set 0.25 ? figure 43. adjustable current source for leds in series
ad5228 rev. 0 | page 16 of 20 automatic lcd panel backlight control with the addition of a photocell sensor, an automatic brightness control can be achieved. as shown in figure 44, the resistance of the photocell changes linearly but inversely with the light output. the brighter the light output, the lower the photocell resistance and vice versa. the ad5228 sets the voltage level that is gained up by u2 to drive n1 to a desirable brightness. with the photocell acting as the variable feedback resistor, the change in the light output changes the r2 resistance, therefore causing u2 to drive n1 accordingly to regulate the output. this simple low cost implementation of an led controller can compensate for the temperature and aging effects typically found in high power leds. similarly, for power efficiency, a pwm signal can be applied at the gate of n2 to switch the led on and off without noticeable effect. 04422-0-045 push-up button push-down button a w b 10k ? v dd gnd pre pu pd u1 ad5228 c1 1 f c2 0.1 f 5v u2 ad8531 + ? v+ v? 5v c3 0.1 f r1 1k ? r3 4.75k ? r2 5v pwm n2 2n7002 n1 2n7002 white led d1 5v photocell figure 44. automatic lcd panel backlight control audio amplifier with volume control the ad5228 and ssm2211 can form a 1.5 w audio amplifier with volume control that has adequate power and quality for portable devices such as pdas and cell phones. the ssm2211 can drive a single speaker differentially between pins 5 and 8 without any output capacitor. the high-pass cutoff frequency is f h1 = 1/(2 r1 c1). the ssm2211 can also drive two speakers as shown in figure 45. however, the speakers must be configured in single-ended mode, and output coupling capacitors are needed to block the dc current. the output capacitor and the speaker load form an additional high-pass cutoff frequency as f h2 = 1/(2 r5 c3). as a result, c3 and c4 must be large to make the frequency as low as f h1 . 04422-0-046 push-up button push-down button a w b 10k ? v dd pre gnd pu pd u1 audio_input u3 ad8591 + ? r4 10k ? r3 10k ? 5v c6 10 f c7 0.1 f 5v f r1 10k ? c2 0.1 f u2 ssm2211 + ? v+ 6 4 3 2 7 1 8 5 v? 5v c5 0.1 f r6 8 ? r5 8 ? c3 470 f c44 470 f r2 10k ? figure 45. audio amplifier with volume control
ad5228 rev. 0 | page 17 of 20 constant bias with supply to retain resistance setting users who consider eemem potentiometers but cannot justify the additional cost and programming for their designs can consider constantly biasing the ad5228 with the supply to retain the resistance setting as shown in figure 46. the ad5228 is designed specifically with low power to allow power conser- vation even in battery-operated systems. as shown in figure 47, a similar low power digital potentiometer is biased with a 3.4 v 450 ma/hour li-ion cell phone battery. the measurement shows that the device drains negligible power. constantly biasing the potentiometer is a practical approach because most of the portable devices do not require detachable batteries for charging. although the resistance setting of the ad5228 is lost when the battery needs to be replaced, this event occurs so infrequently that the inconvenience is minimal for most applications. 04422-0-047 v dd ad5228 u1 gnd v dd u2 gnd component x v dd u3 gnd component y gnd v dd battery or system power sw1 + ? figure 46. constant bias ad5 228 for resistance retention 3.50 3.40 3.41 3.42 3.43 3.44 3.45 3.46 3.47 3.48 3.49 024681012 04422-0-048 days battery voltage (v) t a = 25 c figure 47. battery consumption measurement
ad5228 rev. 0 | page 18 of 20 outline dimensions 1 3 5 6 2 8 4 7 2.90 bsc pin 1 1.60 bsc 1.95 bsc 0.65 bsc 0.38 0.22 0.10 max 0.90 0.87 0.84 seating plane 1.00 max 0.20 0.08 0.60 0.45 0.30 8 4 0 2.80 bsc compliant to jedec standards mo-193ba figure 48. 8-lead small outline transistor package tsot-8 [thin sot-23-8] (uj-8) dimensions shown in millimeters ordering guide model 1 r ab (k?) temperature range package code package description full container quantity branding ad5228bujz10 2 -rl7 10 ?40c to +105c uj tsot-8 3000 d3k ad5228bujz10 2 -r2 10 ?40c to +105c uj tsot-8 250 d3k ad5228bujz50 2 -rl7 50 ?40c to +105c uj tsot-8 3000 d3l ad5228bujz50 2 -r2 50 ?40c to +105c uj tsot-8 250 d3l ad5228bujz100 2 -rl7 100 ?40c to +105c uj tsot-8 3000 d3m ad5228bujz100 2 -r2 100 ?40c to +105c uj tsot-8 250 d3m ad5228eval 10 evaluation board 1 1 the end-to-end resistance r ab is available in 10 k?, 50 k?, and 100 k?. th e final three characters of the part number determine the nominal resistance value, for example,10 k? = 10. 2 z = pb-free part.
ad5228 rev. 0 | page 19 of 20 notes
ad5228 rev. 0 | page 20 of 20 notes ? 2004 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d04422C0C4/04(0)

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